Goncalves, Jorge  ORCID: https://orcid.org/0000-0002-5573-7742, Rogers, Daniel J. ORCID: https://orcid.org/0000-0001-8814-5332 and Liang, Jun ORCID: https://orcid.org/0000-0001-7511-449X
2018.
Submodule temperature regulation and balancing in modular multilevel converters.
IEEE Transactions on Industrial Electronics
65
(9)
, pp. 7085-7094.
10.1109/TIE.2018.2795588
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Abstract
Abstract: In modular multilevel converters, temperature control of semiconductor devices in the sub-modules is a key factor for the safe and reliable operation. Under normal operation significant temperature differences can exist between sub-modules due to, for example, ageing of semiconductor modules and module parameter mismatch. This paper presents a method for achieving sub-module thermal balancing by controlling the capacitor voltage of each sub-module in an arm, while maintaining the sum of the sub-module capacitor voltages at a constant value in order to regulate the dc-link voltage. The proposed temperature balancing strategy is validated using an experimental modular multilevel converter setup with three sub-modules, where an increase in the thermal resistance to ambient of one or more sub-module semiconductors is created by restricting coolant flow to simulate a partial failure in the cooling system. Increases in the thermal resistance by 21 % and 42 %, corresponding to temperature increases of 5 μC and 10 μC, respectively, are managed by three sub-modules, using a capacitor voltage margin of 60 %.
| Item Type: | Article |
|---|---|
| Date Type: | Publication |
| Status: | Published |
| Schools: | Schools > Engineering |
| Publisher: | Institute of Electrical and Electronics Engineers (IEEE) |
| ISSN: | 0278-0046 |
| Date of First Compliant Deposit: | 12 February 2018 |
| Date of Acceptance: | 3 January 2018 |
| Last Modified: | 23 Jul 2023 13:32 |
| URI: | https://orca.cardiff.ac.uk/id/eprint/109052 |
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