Tristate memory cells using double-peaked fin-array III-V tunnel diodes monolithically grown on (001) silicon substrates

Han, Yu, Li, Qiang ORCID: https://orcid.org/0000-0002-5257-7704 and Lau, Kei May 2017. Tristate memory cells using double-peaked fin-array III-V tunnel diodes monolithically grown on (001) silicon substrates. IEEE Transactions on Electron Devices 64 (10) , pp. 4078-4083. 10.1109/TED.2017.2738675

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Abstract

We demonstrate functional tristate memory cells using multipeaked GaAs/InGaAs fin-array tunnel diodes grown on exact (001) Si substrates. On-chip connection of single-peaked tunnel diode arrays produces I–V characteristics with multiple negative-differential resistance regions. We designed and fabricated two types of tristate memory cells. In one design, a double-peaked tunnel diode was used as the drive, and a reverse-biased single-peaked tunnel diode was used as the load. In the other design, the tristate memory cell was realized by the series connection of two forward-biased single-peaked tunnel diodes

Item Type:	Article
Date Type:	Publication
Status:	Published
Schools:	Schools > Physics and Astronomy
Publisher:	Institute of Electrical and Electronics Engineers (IEEE)
ISSN:	0018-9383
Date of Acceptance:	9 August 2017
Last Modified:	20 Oct 2025 07:30
URI:	https://orca.cardiff.ac.uk/id/eprint/112084

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