Scaling of pseudomorphic high electron mobility transistors to decanano dimensions

Kalna, K., Roy, S., Asenov, A., Elgaid, K. ORCID: https://orcid.org/0000-0003-3265-1097 and Thayne, I. 2002. Scaling of pseudomorphic high electron mobility transistors to decanano dimensions. Solid-State Electronics 46 (5) , pp. 631-638. 10.1016/S0038-1101(01)00331-8

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Abstract

The performance enhancement associated with the scaling of pseudomorphic high electron mobility transistors (PHEMTs) to deep decanano dimensions is studied using Monte Carlo (MC) simulations. The full scaling of a standard 120 nm PHEMT to gate lengths of 90, 70, 50 and 30 nm in both lateral and vertical dimensions is compared with an approach where only the lateral dimensions are scaled. The study is based on an extended transport module integrated in the finite element MC simulator H2F and accurate up to an electric field of 200 kV/cm, and on the careful calibration of MC device simulations against I–V characteristics from the real 120-nm gate length PHEMT. The fully scaled devices exhibit a continuous improvement in transconductance as channel lengths reduce while performance deteriorates in devices scaled only laterally. The contact resistances become a limiting factor to the performance of the fully scaled devices at shorter channel lengths. The microwave performance of the scaled devices is studied using the transient MC analysis.

Item Type:	Article
Date Type:	Publication
Status:	Published
Schools:	Engineering
Publisher:	Elsevier
ISSN:	0038-1101
Date of Acceptance:	6 November 2001
Last Modified:	04 Nov 2022 12:18
URI:	https://orca.cardiff.ac.uk/id/eprint/122562

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