Azad, Ehsan M., Bell, James J. ![]() ![]() ![]() ![]() ![]() |
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Official URL: http://dx.doi.org/10.1109/IMS30576.2020.9223817
Abstract
This paper presents a novel approach to incorporate gate bias voltage variations into the Cardiff behavioural model formulation. In particular, it is observed that the model coefficients can be expressed effectively as a linear function of bias voltage. As a result, the intensity of the load-pull measurement can decrease up to 80 % as the interpolation of the data with respect to the gate bias voltage can be exploited. The experiment was done on a 4 W GaN technology on-wafer device and the result is verified on 0.2 W GaAs technology device.
Item Type: | Conference or Workshop Item (Paper) |
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Date Type: | Published Online |
Status: | Published |
Schools: | Engineering |
Additional Information: | © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
Publisher: | IEEE |
ISBN: | 9781728168159 |
ISSN: | 2576-7216 |
Funders: | Marie Skłodowska-Curie Action |
Date of First Compliant Deposit: | 4 January 2021 |
Date of Acceptance: | 20 February 2020 |
Last Modified: | 27 Nov 2022 12:36 |
URI: | https://orca.cardiff.ac.uk/id/eprint/136141 |
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