Reliability and cost-oriented analysis, comparison and selection of multi-level MVdc converters

Abeynayake, Gayan, Li, Gen ORCID: https://orcid.org/0000-0002-0649-9493, Joseph, Tibin ORCID: https://orcid.org/0000-0003-4647-1118, Liang, Jun ORCID: https://orcid.org/0000-0001-7511-449X and Ming, Wenlong ORCID: https://orcid.org/0000-0003-1780-7292 2021. Reliability and cost-oriented analysis, comparison and selection of multi-level MVdc converters. IEEE Transactions on Power Delivery 36 (6) , pp. 3945-3955. 10.1109/TPWRD.2021.3051531

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Abstract

DC technology has gained considerable interest in the medium voltage applications due to the benefits over the AC counterpart. However, to utilize the full capacity of this development, selection of a suitable power electronic converter topology is a key aspect. From the pool of voltage source converters (VSCs), it is unclear which topology is suitable for multi-megawatt applications at medium voltage dc (MVdc) levels. To address this, the paper proposes a selection guideline based on reliability and optimum redundancy levels of VSCs for MVdc applications. This will be combined with other functional factors such as operational efficiency and return-on-investment. Three candidate multi-level topologies namely three-level neutral point clamped converter (3L-NPC), modular multi-level converter (MMC) and cascaded 3L-NPC (which is being used for the first MVdc link in the UK) have been evaluated over two-level-VSC from 10 kV to 50 kV. Results show that with the increase of MVdc voltage level MMC shows better performance whereas at low MVdc levels 3L-NPC is the prominent topology.

Item Type:	Article
Date Type:	Publication
Status:	Published
Schools:	Engineering
Additional Information:	© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works
Publisher:	Institute of Electrical and Electronics Engineers (IEEE)
ISSN:	0885-8977
Funders:	European Commission?s Horizon 2020 Research & Innovation Programme, EPSRC
Date of First Compliant Deposit:	14 January 2021
Date of Acceptance:	13 January 2021
Last Modified:	09 Nov 2024 04:30
URI:	https://orca.cardiff.ac.uk/id/eprint/137653

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