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Investigation and analysis into device optimization for attaining efficiencies in-excess of 90% when accounting for higher harmonics

Clarke, Alan Leslie, Akmal, Muhammad, Lees, Jonathan ORCID: https://orcid.org/0000-0002-6217-7552, Tasker, Paul J. ORCID: https://orcid.org/0000-0002-6760-7830 and Benedikt, Johannes ORCID: https://orcid.org/0000-0002-9583-2349 2010. Investigation and analysis into device optimization for attaining efficiencies in-excess of 90% when accounting for higher harmonics. Presented at: IEEE MTT-S International Microwave Symposium, Anaheim, CA, USA, 23-28 May 2010. 2010 IEEE MTT-S International Microwave Symposium Digest (MTT 2010). New York: IEEE, pp. 1114-1117. 10.1109/MWSYM.2010.5517222

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Abstract

A rigorous, systematic, measurement-founded approach is presented that enables the design of highly efficient power amplifiers. The identified process allows the designer to quickly identify the parameters necessary for completion of a design whilst ascertaining their flexibility and impact on performance degradation. The investigation continues to consider the impact of the higher harmonics and gate bias as design tools on the performance of the design and proposes a strategy that utilizes their positive effect as well as considering the subsequent impact on device scaling. This was carried out on GaAs pHEMT devices from commercial processes that obtained measured peak efficiencies of 90.1% at P1dB in a class-B bias.

Item Type: Conference or Workshop Item (Paper)
Date Type: Publication
Status: Published
Schools: Engineering
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Uncontrolled Keywords: Power amplifiers; microwave measurements; load-pull; class-F; inverse class-F
Additional Information: Proceedings of a meeting held 23-28 May 2010, Anaheim, California, USA.
Publisher: IEEE
ISBN: 9781424460564
Last Modified: 18 Oct 2022 13:50
URI: https://orca.cardiff.ac.uk/id/eprint/15601

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