Two-port measurement of packaging parasitic inductance in SiC half-bridge power modules considering mutual inductance*

Li, Chen, Wu, Jianzhong ORCID: https://orcid.org/0000-0001-7928-3602, Liu, Ying ORCID: https://orcid.org/0000-0001-9319-5940, Ludtke, Ingo and Ming, Wenlong ORCID: https://orcid.org/0000-0003-1780-7292 2023. Two-port measurement of packaging parasitic inductance in SiC half-bridge power modules considering mutual inductance*. Presented at: 3rd International Conference on Industrial Electronics for Sustainable Energy Systems, Shanghai, China, 26-28 July 2023. Proceedings of 3rd International Conference on Industrial Electronics for Sustainable Energy Systems. IEEE, pp. 1-6. 10.1109/IESES53571.2023.10253690

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Abstract

This paper proposed a two-port measurement method, which improves the accuracy of measured parasitic inductances for SiC MOSFET half-bridge modules by considering the mutual inductances. The method process has three steps to measure the impedance parameters (Z-parameters) by imitating the switching transient. Then, the model of the power module was simulated in ANSYS Q3D to extract the parasitic inductances including the mutual inductances. These parameters were imported to ADS to build the small signal model of the SiC MOSFET. The proposed method was applied to the simulation circuit, and the ADS results agree well with the Q3D results, showing a maximum error of 0.9%. The validation indicates that the proposed measurement method can extract parasitic inductance accurately through the simple three steps.

Item Type:	Conference or Workshop Item (Paper)
Date Type:	Publication
Status:	Published
Schools:	Engineering
Publisher:	IEEE
ISBN:	9798350324761
Last Modified:	01 Nov 2023 10:15
URI:	https://orca.cardiff.ac.uk/id/eprint/163404

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