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Improved grid impedance compensation for phase-locked loop to stabilize the very-weak-grid connection of VSI's

Li, Chuanyue ORCID:, Liu, Wei, Liang, Jun ORCID:, Ding, Xiaolin and Cipcigan, Liana M. ORCID: 2022. Improved grid impedance compensation for phase-locked loop to stabilize the very-weak-grid connection of VSI's. IEEE Transactions on Power Delivery 37 (5) , pp. 3863-3872. 10.1109/TPWRD.2021.3140024

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Voltage source inverters (VSIs) with vector control based on phase-locked loop (PLL) suffer instability when connecting to a very weak AC grid (short circuit ratio (SCR)<1.3). The conventional grid impedance compensation for the PLL by virtually reducing the grid impedance can stabilize this connection. However, the analysis in this paper indicates that its stabilization effectiveness is sensitive to grid impedance variance and, indeed, overcompensation causes the PLL instability. Therefore, in this paper, an improved grid impedance compensation for the PLL is proposed to achieve the same stabilization for very-weak-grid connection and possess a good tolerance of grid impedance variance and overcompensation. A comprehensive Small-signal model of the VSI using the proposed PLLs grid impedance compensation is derived for stability analysis and parameter design. The time-domain simulation for this VSI is built to validate the stability analysis. Comparison studies for both proposed and conventional PLLs grid impedance compensation are conducted including the stability effectiveness, VSI performance and grid impedance variance.

Item Type: Article
Date Type: Publication
Status: Published
Schools: Engineering
Publisher: Institute of Electrical and Electronics Engineers
ISSN: 0885-8977
Date of First Compliant Deposit: 10 January 2022
Date of Acceptance: 18 December 2021
Last Modified: 22 May 2023 21:25

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