Analysis and mitigation of DC voltage imbalance for medium-voltage cascaded three-level neutral-point-clamped converters

Chen, Jinlei, Ming, Wenlong ORCID: https://orcid.org/0000-0003-1780-7292, Ugalde Loo, Carlos E. ORCID: https://orcid.org/0000-0001-6361-4454, Wang, Sheng ORCID: https://orcid.org/0000-0002-2258-2633 and Jenkins, Nick ORCID: https://orcid.org/0000-0003-3082-6260 2022. Analysis and mitigation of DC voltage imbalance for medium-voltage cascaded three-level neutral-point-clamped converters. IEEE Transactions on Power Electronics 37 (4) , pp. 4320-4336. 10.1109/TPEL.2021.3129877

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Abstract

The cascaded three-level neutral-point-clamped (3L-NPC) converter and the modular multi-level converter (MMC) are attractive solutions for medium-voltage direct-current (MVDC) applications. Due to their low cost compared to MMCs, cascaded 3L-NPC converters have been adopted in ANGLE-DCa 30 MVA MVDC link demonstration project in North Wales, UK. DC voltage imbalance across submodules (SMs) is a common challenge for both types of MVDC converters. Such imbalance is topology dependent and remains under-researched for cascaded 3L-NPC converters. In this paper, small-signal model-based analysis has been done to reveal that the dc voltage imbalance in cascaded 3L-NPC converters is caused by an unstable system pole. Two voltage balancing methods are presented. The first method is based on PI controllers to precisely regulate SMs voltages without influencing output power. However, it relies on communication between a central controller and local controllers within SMs. The second method uses inverse-droop based control to take over the dc voltage regulation upon loss of communication. Both balancing methods are experimentally validated using a 30 kVA testbed based on the ANGLE-DC project. It has been demonstrated that the dc voltages of SMs can be effectively balanced with both methods during changes of load conditions and dc bus voltages.

Item Type:	Article
Date Type:	Publication
Status:	Published
Schools:	Engineering
Publisher:	Institute of Electrical and Electronics Engineers
ISSN:	0885-8993
Date of First Compliant Deposit:	19 November 2021
Date of Acceptance:	12 November 2021
Last Modified:	04 Dec 2024 07:45
URI:	https://orca.cardiff.ac.uk/id/eprint/145635

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