A Genetic Algorithm for VLSI floorplanning

Mumford, Christine Lesley ORCID: https://orcid.org/0000-0002-4514-0272 and Wang, Pearl Y. 2000. A Genetic Algorithm for VLSI floorplanning. Presented at: Parallel Problem Solving from Nature PPSN VI: 6th International Conference, Paris, France, 18–20 September 2000. Published in: Schoenauer, Marc, Deb, Kalyanmony, Rudolph, Gunther, Yao, Xin, Lutton, Evelyne, Merelo, Juan Julian and Schnefel, Hans-Paul eds. Parallel Problem Solving from Nature PPSN VI: 6th International Conference Paris, France, September 18–20, 2000: Proceedings. Parallel Problem Solving from Nature PPSN VI Lecture Notes in Computer Science. Lecture notes in computer science (1917) Springer, pp. 671-680. 10.1007/3-540-45356-3_66

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Abstract

We present a genetic algorithm (GA) which used a normal- ized postfix encoding scheme to solve the VLSI oorplanning problem. We claim to have overcome the representational problems previously associated with encoding postfix expressions into GAs, and have developed a novel encoding scheme which preserves the integrity of solutions under the genetic operators. Optimal floorplans are obtained for module sets taken from some MCNC benchmarks. The slicing tree construction procedure, used by our GA to generate the floorplans, has a run time scaling which compares very favourably with other recent approaches.

Item Type:	Conference or Workshop Item (Paper)
Status:	Published
Schools:	Computer Science & Informatics
Subjects:	Q Science > QA Mathematics Q Science > QA Mathematics > QA75 Electronic computers. Computer science Q Science > QA Mathematics > QA76 Computer software
Publisher:	Springer
Last Modified:	20 Oct 2022 09:26
URI:	https://orca.cardiff.ac.uk/id/eprint/31947

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