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Reduction of DC-link ripples for SiC-based three-phase four-wire inverters with unbalanced loads

Yang, Peng ORCID:, Ming, Wenlong ORCID:, Liang, Jun ORCID:, Wu, Jianzhong ORCID: and Liu, Wei 2019. Reduction of DC-link ripples for SiC-based three-phase four-wire inverters with unbalanced loads. Presented at: 11th Energy Conversion Congress and Exposition (ECCE 2019), Baltimore, MD, USA, 29 September - 3 October 2019. 2019 IEEE Energy Conversion Congress and Exposition (ECCE). IEEE, 10.1109/ECCE.2019.8912810

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Three-phase inverters are widely used in the smart grid to integrate renewable energy resources. When the inverters are used to feed the unbalanced three-phase loads, the threephase four-wire inverters are usually required to provide the current path for neutral currents. However, unbalanced loads will cause undesirable second-order ripples on DC bus. Conventional three-phase four-wire inverters with neutral legs can not address this challenge. Bulky capacitors or extra active circuits are still required to reduce the ripples. This inevitably leads to increased size and cost of the system. Although SiC-based converters have the advantage of achieving high power density, the DCbus capacitance can not be reduced by simply replacing Si IGBTs with SiC MOSFETs. In this paper, a new topology of SiC-based three-phase four-wire inverters is proposed to reduce the DC-bus ripples without adding any additional hardware components. With the reduction of DC-bus ripples, the DC-bus capacitance can be reduced to achieve high power density. The equivalent circuit is analyzed and the control strategy for the proposed topology is designed. The proposed topology is built in Matlab/Simulink and simulation results are presented to verify the proposed topology.

Item Type: Conference or Workshop Item (Paper)
Date Type: Published Online
Status: Published
Schools: Engineering
Publisher: IEEE
ISBN: 978-1-7281-0396-9
ISSN: 2329-3721
Date of First Compliant Deposit: 10 December 2019
Last Modified: 11 Mar 2023 02:31

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