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Motor overvoltage mitigation using SiC-based zero-voltage switching inverter

Yunus, Suleman ORCID:, Ming, Wenlong ORCID: and Ugalde Loo, Carlos ORCID: 2024. Motor overvoltage mitigation using SiC-based zero-voltage switching inverter. IEEE Transactions on Power Electronics 39 (1) , pp. 1195-1208. 10.1109/TPEL.2023.3316591

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The motor overvoltage phenomenon is an issue that may arise from the high voltage slew rates ( dv/dt ) of silicon carbide MOSFETs in cable-fed drives. This can lead to substantial strain on cable and motor insulation, resulting from partial discharges and uneven voltage distribution. In line with this, this paper presents a novel method to select inductor and capacitor parameters for a zero-voltage switching (ZVS) inverter to mitigate motor overvoltage. The ZVS inverter employs only one additional active switch on the positive dc terminal compared to two-level inverters. This prevents the need for bulky LCR and RC passive filters or multilevel inverters in conventional solutions which may lead to increased volume and losses. The presented approach suppresses overvoltage oscillations by profiling the dv/dt of both resonant and natural commutations whilst minimizing the switching losses. A comparison with alternative techniques for mitigating motor overvoltage was conducted to demonstrate the method's efficacy, including two-level passive filter strategies and three-level inverters. The presented technique was validated through simulations in PLECS and MATLAB/Simulink, demonstrating a 1% increase in efficiency and a 30% reduction in volume. Furthermore, the method was experimentally verified, showing the measured overvoltage being reduced from 2 p.u. to 1.06 p.u.

Item Type: Article
Date Type: Publication
Status: Published
Schools: Engineering
Publisher: Institute of Electrical and Electronics Engineers
ISSN: 0885-8993
Funders: EPSRC
Date of First Compliant Deposit: 15 September 2023
Date of Acceptance: 2 September 2023
Last Modified: 04 Dec 2023 17:47

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