High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications

Radosavljevic, M., Ashley, T., Andreev, A., Coomber, S. D., Dewey, G., Emeny, M. T., Fearn, M., Hayes, D. G., Hilton, K. P., Hudait, M. K., Jefferies, R., Martin, T., Pillarisetty, R., Rachmady, W., Rakshit, T., Smith, S. J., Uren, M. J., Wallis, D. J. ORCID: https://orcid.org/0000-0002-0475-7583, Wilding, P. J. and Chau, Robert 2008. High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications. Presented at: IEEE International Electron Devices Meeting, San Francisco, CA, 15-17 Dec 2008. 10.1109/IEDM.2008.4796798

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Abstract

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm2/V-s. The shortest 40nm gate length (LG) transistors achieve peak transconductance (Gm) of 510μS/μm and cut-off frequency (fT) of 140GHz at supply voltage of 0.5V. These represent the highest Gm and fT ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.

Item Type:	Conference or Workshop Item (Paper)
Date Type:	Publication
Status:	Published
Schools:	Engineering
Last Modified:	23 Oct 2022 13:02
URI:	https://orca.cardiff.ac.uk/id/eprint/109494

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