Cardiff University | Prifysgol Caerdydd ORCA
Online Research @ Cardiff 
WelshClear Cookie - decide language by browser settings

85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications

Datta, S., Ashley, T., Brask, J., Buckle, L., Doczy, M., Emeny, M., Hayes, D., Hilton, K., Jefferies, R., Martin, T., Phillips, T.J., Wallis, D. ORCID: https://orcid.org/0000-0002-0475-7583, Wilding, P. and Chau, R. 2005. 85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications. Presented at: IEEE International Electron Devices Meeting, Washington DC, 5 Dec 2005. Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International. IEEE, 10.1109/IEDM.2005.1609466

Full text not available from this repository.

Abstract

We demonstrate for the first time 85nm gate length enhancement and depletion mode InSb quantum well transistors with unity gain cutoff frequency, fT, of 305 GHz and 256 GHz, respectively, at 0.5V VDS, suitable for high speed, very low power logic applications. The InSb transistors demonstrate 50% higher unity gain cutoff frequency, fT, than silicon NMOS transistors while consuming 10 times less active power

Item Type: Conference or Workshop Item (Paper)
Date Type: Publication
Status: Published
Schools: Engineering
Publisher: IEEE
ISBN: 078039268X
Last Modified: 23 Oct 2022 13:02
URI: https://orca.cardiff.ac.uk/id/eprint/109505

Citation Data

Actions (repository staff only)

Edit Item Edit Item